PDK Software Engineer - VLSI Physical Verification

Job Description
Designs, develops, tests, and debugs software tools, flows, and methodologies used in design automation and by teams in the design of hardware products, process design, or manufacturing. Responsibilities include capturing user stories/requirements, writing both functional and test code, automating build and deployment, and/or performing unit, integration, and endtoend testing of the software tools.

Qualifications

Minimum Qualifications: Bachelor of Science in Computer Engineering (CE), Electrical Engineering (EE) with 3+ years of semiconductor industry experience OR Master of Science in CE, EE with 2+ years of semiconductor industry experience. Required semiconductor industry experience in the following areas: DRC/LVS/Extraction runsets and EDA tools (Synopsys ICV, Siemens/Mentor Calibre, and Cadence Pegasus, and simulation tools) Unix/Linux operating system At least one of the following: C++, Python, Perl, TCL VLSI design process, reliability verification, ESD concepts, standard cell library, and memory architectures Preferred Qualifications: Knowledge in semiconductor device physics, models, parasitic extraction, and technology scaling Experience with working in software repository management tools like Git

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.