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Job ID: JR0211118
Job Category: Engineering
Primary Location: Guadalajara, JAL MX
Other Locations:
Job Type: Experienced Hire

SoC Design Engineer

Job Description

The Silicon Technology Prototyping team within Intel Labs is looking for SoC designers wishing to engage in the experience of building Intel's future generation technologies while working alongside Intel's very talented circuit designers.

In this role, your responsibilities can include but not be limited to:

  • Execute block-level synthesis, floor planning, clock tree synthesis, place and route, timing closure and layout cleanup.
  • Drive the block level's timing, Design Rule Checks (DRC), Layout Versus Schematic (LVS), Formal Equivalence Verification (FEV) convergence as well as participate in full chip convergence.
  • Work alongside circuit designers to debug timing constraints and debug circuit implementation issues.
  • Develop design implementation methodologies, design flow automation and improvements on existing flows which increase productivity.


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Requirements listed would be obtained through a combination of industry-relevant job experience, internship experiences and or school work/classes/research

Minimum qualifications:

  • Intermediate+ English Level
  • Bachelor's degree in Electrical, Computer Engineering, or related field of study (Professional License "Cedula Profesional" may be required)
  • 1+ year of experience in VLSI or ASIC/SOC design in one or more of the following areas: RTL synthesis, floor planning, placement, Clock Tree Synthesis (CTS), routing, layout verification, static timing analysis
  • 6+ months of experience in Hardware Description Languages like Verilog, System Verilog, VHDL
  • 4+ months of scripting languages
  • 4+ months of CMOS layout concepts


Preferred Qualifications:

  • Master's degree in Electrical, Computer Engineering, or related field of study
  • Experience with industry-standard IC CAD tools such as Synopsys Design Compiler, IC Compiler II, Prime Time, etc
  • CMOS layout experience and exposure to DRC/LVS convergence
  • Knowledge of TCL, PERL and UNIX scripting languages


 

Inside this Business Group

Intel Labs is the company's world-class, industry leading research organization, responsible for driving Intel's technology pipeline and creating new opportunities. The mission of Intel Labs is to deliver breakthrough technologies to fuel Intel's growth. This includes identifying and exploring compelling new technologies and high risk opportunities ahead of business unit investment and demonstrating first-to-market technologies and innovative new usages for computing technology. Intel Labs engages the leading thinkers in academia and industry in addition to partnering closely with Intel business units.



Work Model for this Role

This role is available as fully home-based and generally would require you to attend Intel sites only occasionally based on business need.

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