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Job ID: JR0182801
Job Category: Engineering
Primary Location: Hillsboro, OR US
Other Locations: US, California, Folsom
Job Type: Experienced Hire

SOC Design Engineer - Physical Design

Job Description

Come join Intel's Client Engineering Group responsible for designing Client SoCs that make up more than half of Intel's annual revenue. We envision the future of computing and design for the next generation of laptops and desktop computers We are looking for an SoC System on Chip Physical Design Engineer ready to research design develop and test lead Intel designs as we reimagine how to build SoCs at Intel and in the semiconductor industry.

This role is within Intel's highly regarded Devices Development Group headquartered in Portland Oregon with additional sites in Austin Texas and Penang Malaysia. Our bold purpose as a company is to create world changing technology that enriches the lives of every person on earth and this role is instrumental in furthering our mission to shape the future of technology.

Your responsibilities may include but not be limited to:

  • SoC Design integration Methodology
  • Clock design Methodology
  • Power delivery
  • Drive performance optimization including co optimization work with process teams to create best in class designs
  • Physical synthesis place and route and clock tree synthesis with Synopsys or Cadence tools
  • Static timing analysis constraint understanding generation clock stamping and timing closure
  • Multiple Power Domain analysis using standard Power Formats UPF or CPF

In addition to the qualifications listed below the ideal candidate will also demonstrate the following traits:

  • Self motivator with strong problem solving skills
  • Leadership skills with willingness to mentor junior designers
  • Interpersonal skills
  • Written and verbal communication skills
  • Willing to work with teams across project domains and Geos


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:


The candidate must have a Bachelors or Masters degree in Electrical and/or Computer Engineering and the below experience:

  • 4+ years of experience in backend design and/or integration

  • 3+ years of experience in product development and delivery on leading edge process nodes

Inside this Business Group

The Devices Development Group (DDG) is a global organization focused on the development and integration of SOCs, critical IPs including Atom and chipsets that power Intel's leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.



Other Locations

US, California, Folsom



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

USExperienced HireJR0182801
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