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Job ID: JR0168501
Job Category: Engineering
Primary Location: Albuquerque, NM US
Other Locations:
Job Type: Experienced Hire

Wafer Level Assembly Process Engineer

Job Description

This position is a Wafer Level Assembly (WLA) /Die Prep Process Engineering role for the Foveros Program at Intel's New Mexico campus. This new Semiconductor Assembly process is an integral part of the Foveros technology that Intel announced in 2019.

You will be responsible for all aspects of your assigned module including safety, quality, output, cost of operation, and labor productivity. The scope of work and responsibilities of an Assembly engineer are very similar to those of a fab module engineer. Responsibilities include, but are not limited to:

  • Work with the Development/Transfer site to become an expert for an assembly process toolset and successfully deliver knowledge and aspects of the process to your homesite (New Mexico) for a successful qualification and transfer
  • Sustain the day-to-day operations of your area by responding to, containing, and dispositioning safety and quality concerns, addressing down tools, and implementing solutions to prevent repeat incidents
  • Continuously improve your area by proactively identifying and implementing safety and ergonomic improvements, excursion prevention measures, methods to increase tool utilization, and reduce cost
  • Meeting production quality and reliability requirements
  • Own tool installs and qualification of new sort hardware
  • Developing solutions to problems utilizing formal education, statistical knowledge and problem-solving tools

The candidate must exhibit the following behavioral traits/skills:

  • Ability to multitask with good tolerance of ambiguity
  • Demonstrated experience with technical problem-solving skills
  • Highly motivated and excited by self-directed hands-on work
  • Written and verbal communication skills
  • Be comfortable working in factory and/or lab environment
  • Analytical skills
  • Influence others and build consensus and trust within a team.

#LUT


Qualifications

Minimum Requirements:

  • Must have PhD or Masters with 3 year's experience or bachelors with 5 years of experience with a degree in Mechanical, Electrical, Chemical or Material Science Engineering and the following skills\experience:
  • 2+ years experience with semiconductor assembly/packaging equipment such as grinders, laser oblation tools, mold deposition processing, x-ray or CSAM metrology
  • 2+ years experience formulating and executing a full project scope (problem statement, DOE development, data collection and driving a result review with recommendation)


Preferred Qualifications:

  • Strong computer skills
  • Technical background in wafer level assembly and semiconductor packaging processes
  • Relevant hands on experience with wafer level processing equipment (hands on and recipe development)
  • Programming experience with large projects involving multiple contributors specifically in JMP or related applications
  • 3 years Applied research or Product/Process Development experience

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

USExperienced HireJR0168501
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