In this position you will work in a group of pre-Silicon design Quality and Reliability
Engineers (QRE), supporting development of CPU and Hard IPs on the most advanced Intel processes. You will be responsible for pre-Silicon verification and execution of simulations in the design phase as well as developing new design methods, flows and tools for VLSI circuit IP and SoC projects.
Primary responsibilities are to establish technical leadership within a team of engineers and lead the overall partnership with Hard IP and SoC design teams. Other responsibilities include performing quality audits in the design phase, risk assessments on pre-silicon design reliability and analysis of physical design performance verification (PV) as well as reliability verification (RV) results.
Key tasks include pre-silicon design modeling and correct-by-construction design simulation verifications to mitigate circuit marginalities in Device Aging, Interconnect Reliability (Electromigration), Electro Static Discharge (ESD), Latch-Up (LU), Soft Error Reliability (SER) as well as design/package interactions. Other tasks include program management and technical guidance to junior team members. An important aspect of this role is to assess risks associated with design process marginalities and drive resolutions with partners from design architecture and manufacturing teams.
As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth