Qualifications
Minimum qualifications
- Must have a Bachelors (B.Tech) or Masters (M.Tech) in Electrical Engineering
- 5 years experience with scripting (Perl, tcl etc.)
- 5 years' experience in memory design convergence tools including: formal equivalence verification, static timing methodology, electrical reliability and robustness analysis
- 5 years' experience with transistor level operation, memory bitcell design, design challenges under process variations and low power circuit techniques
Preferred Qualifications
- Experience with scripting (Perl, tcl etc.) to develop a memory compiler and support or enhance the tool as required
IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.