The position is for a technical contributor (individual) role in the areas of layout verification flows and methodologies. In this position, you will be expected to define and drive physical verification flows and methodologies including block integration and tape-in methodologies. You will be expected to provide necessary data in making decisions on tools and methodologies of choice in the associated domains on leading edge process nodes . You will be expected to work with key stakeholders in design, central CAD, other projects on similar technologies and local CAD teams to define and drive next generation tools and methodologies in physical design world closely working with both external and internal vendors. You may need to respond to customer/client requests or events as they occur, develops solutions to problems utilizing formal education and judgement. You will be expected to develop and deploy ICV/Calibre based runsets for Intel advanced process technologies.
Inside this Business Group
Candidate needs to have Master's degree (M.Tech/MS) in Electronics Engineering or equivalent qualification from reputed institute with 2+ years of relevant experience. He should have good knowledge of VLSI and Digital electronics. Understanding of fabrication and process technology will be added advantage. Any scripting language experience, like ICV, Calibre, perl, TCL, python would be plus point.
As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth