Objectives of the position
· Own and deliver the Circuit Design/Sign-off verification of analog circuits like amplifiers, comparators, reference circuits, power-management, data-converter, GPIO blocks.
· Work with internal stakeholders such as mask design for circuit implementation and logic design to design the analog/digital interface
· Continuously work towards improving Turnaround time, robustness and area/power of circuit designs.
· Drive towards technical excellence, innovation and harvest publications/patents.
· Post-silicon electrical validation, post silicon debug and high-volume manufacturing support for the IPs.
Desired Competencies and Experiences:
· Deep understanding of Circuit design/ physical design of Analog Designs on advanced process technologies.
· Technical expertise in Industry standard tools such as Cadence design Environment (ADEXL or Virtuoso) Knowledge of DRC, LVS, and post-layout extraction tools etc.
· Knowledge of CMOS transistor & semiconductor device layout methods and transistor-level circuit simulation tools such as SPICE
· Strong academic background required in CMOS semiconductor device physics and silicon processing. Relevant coursework in CMOS analog, and I/O circuit design
· Excellent communication, problem solving skills, multitasking ability and attention to quality and detail.
· Expertise in mixed signal designs, data-converters is a major plus.
Inside this Business Group
BS/MS - EE/CS and 3+ Years of industry experience.
IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.