Physical design engineer with experience in Structural Design. Hands-on experience of block, IP, and full-chip floor-planning, synthesis, APR, static-timing, electrical/reliability analysis, tapeout flows.Leading capability to drive SD improvements, definitions and execution. Good communication and team work skills. Knowledge of RTL-to-GDS flow through synthesis and P and R with targets for power, performance, and area. Implement and validate physical design on the aspects of timing, area, reliability, testability and power. Developing SD teams for optimal performance and productivity.Define area, frequency, performance, power and schedule trade-offs
The ideal candidate should possess a Bachelor or Masters in EE/CE with High Performance Solutions Implementation experience
Strong planning, and problem-solving skills
Experience hands-on execution (synthesis, place and route, timing analysis, and SD verification tools).
Knowledge of logic design principles along with timing and power implications
Understanding of low power micro architecture and implementation techniques
Familiarity with high performance architecture
Experience with scripting in Python, Perl and/or TCL
B E / M TechInside this Business Group
The Design Engineering Group is a worldwide team responsible for the design, development, validation, and manufacturing of IPs and SOCs. Our mission is to deliver leadership products through groundbreaking innovations.