In this position, you will participate in the design, development, validation and delivery of standard cell libraries using leading process technologies for use in the design of Intel's next-generation SoCs and microprocessors.
Responsibilities include, but are not limited to:
Design and implementation of the combinatorial, clock, power management and sequential circuits for Intel's newest process technologies.
Parasitic extraction and circuit optimization for power/performance/robustness/density.
Library characterization for timing, noise, power and variation models (non-linear delay models & composite current source models, parametric on chip variation models).
Reliability verification of standard cells covering ERC, EM, SH, FinFet self-heating. APL characterization and modeling.
Developing functional models behavioral Verilog, power udp Verilog and fault models.
Development of automation for library modeling, validation, quality checking, performance and reliability verification.
The library build, validation, QA, release, and support.
You must possess a minimum of Master's degree in the field of electronics engineering. Specialization or experience in VLSI is preferred.
A minimum of 8+ years of relevant experience in standard cell library design.
The successful candidate must possess excellent written and verbal communication skills, strong customer/result orientation and the ability to work with external and internal partners in a flexible manner.
Experience in digital circuit design, including CMOS combinatorial logic and sequential element design and layout. Good understanding of device physics and FinFet characteristics.
Experience using industry-standard design automation tools in one or more of the areas: circuit simulation, std cell characterization, synthesis, place and route, physical design verification and reliability verification.
Experience in scripting (TCL, Perl, Python, ML) for design automation
Experience working in the Linux environment and its development tools
Experience in EDA tool/flow/methodology, product and IP developments are strongly preferred.
Good engineering acumen and analytical skills. Quick learner with debugging skills.
IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.