Use of the Offensive Security Researcher job code requires IPAS approval. Responsible for leading or taking an active role in complex, multidisciplinary security research projects. Commands deep pervasive pulse on Intel business/technologies and emerging threat landscape in hacker community to prioritize offensive security research focus. Ability to navigate around ambiguities and obstacles to independently solve complex problems. Demonstrated expertise in vulnerability discovery, analysis and exploitation. Explores and invents software and hardware techniques as a method of attack against compute targets. Develops proof of concepts to characterize exploitability and impacts. Recommends systemic mitigations and demonstrates their robustness across a diverse portfolio of products. Leads automation pathfinding to improve security assurance capabilities of product teams. Shares expert insights and new learning and contributes intellectual property to internal and external communities. Requires knowledge of computer architecture, SoC development & manufacturing processes/methodologies, CPU design, SoC layout, chipset functionality, FW & HW security, crypto, and other x86 compute paradigms. Demonstrates effective communication with executives and productive collaboration with peer researchers.
- Must have a MS or PhD in Computer Engineering, Electrical Engineering, or Computer Science
- 10 yr experience in IA, SoC, IP development (architecture, design and implementation phase); Experience with x86, System Verilog, assembly, high level programming language
- Demonstrated expertise in security threat modeling, vulnerability identification, exploitation development, and mitigation spanning hardware and software domain.
- Led research on security technologies and/or implementation of countermeasures of classes of vulnerability. Commands deep pervasive pulse on Security technologies (Intel technologies such as CSME, TXT, SGX, TDX, cryptography, secure protocols/standards such as SPDM) and emerging threat landscape in the hacker community
- Proven experience with hardware/software testing and tools, low level debug. Knowledge in both pre-Si and post-Si validation methodologies and applied tools is a must (simulation, emulation, ITP, Python, Fuzzing, etc).Inside this Business Group
The Design Engineering Group is a worldwide team responsible for the design, development, validation, and manufacturing of IPs and SOCs. Our mission is to deliver leadership products through groundbreaking innovations.