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Job ID: JR0169891
Job Category: Engineering
Primary Location: Folsom, CA US
Other Locations: US, California, Santa Clara
Job Type: Experienced Hire

Analog Engineer

Job Description

This position is associated with the sale of Intel's NAND memory and storage business to SK hynix (You can read more about the transaction in the press release - https://newsroom.intel.com/wp-content/uploads/sites/11/2020/10/nand-memory-news-q-a.pdf). The transaction will enhance the resources and potential of the business storage solutions, including client and enterprise SSDs, in the rapidly growing NAND Flash space amid the era of big data.

This is an exciting time to be at Intel - come join our team as a Analog Engineer and work on one of the most advanced 3DNAND and SSD technology portfolios in the world. As the global leader in the semiconductor industry, Intel possesses many industry-leading SSD technologies including the most capable Quadruple Level Cell (QLC) NAND Flash products. As a Analog Engineer, you will be part of a world-class team that will transition to lead the SSD business at SK hynix.

This position aligns to Phase 2 of the transaction, which includes NAND technology and component development along with fab operations. Employees aligned to Phase 2 will continue to be employed by Intel and will continue to develop NAND technology and components and manufacture NAND wafers at the fab. Phase 2 of the transaction is expected to close in March 2025, at which time employees aligned to this phase of the transaction will transition employment to SK hynix.

You will be a member of the Non-volatile memory Solutions Group working on NAND memory products as an Analog/Mixed-signal/IO Design engineer. Your responsibilities will include (but are not limited to):

NAND Custom and IO circuit design, validation, reliability analysis, timing/chip-planning, layout interaction, extraction and co-optimization.

Top level analog system design and integration, intensive analog, IO and mixed-signal validation and debug. Process, device, template evaluation, and characterization.

Understand and lead methodology development.

The additional responsibilities include the post-silicon electrical validation, Signal Integrity/PD work and interacting with system hardware board teams, post silicon debug, and high volume manufacturing support in the circuit.

You will also be responsible for interfacing with cross functional teams (technology, architecture, product engineering etc.) and maybe leading small teams during different phases of product development in addition to owning design tasks. Cross team interface skills along with good written and oral communication skills are very important.


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

BS (MS or PhD preferred) in electrical Engineering (EE or ECE)
Minimum 10+ years of Analog and High-speed IO circuit design industry experience and gone through multiple product cycles from definition to design to pre and post-silicon validation to product qualification.
Experience in transistor level analog and mixed signal and IO datapath circuit design.
Experience in DDR or Serial-IO or NAND/3DXP High-speed IO interface blocks like Transmitter, Receiver, DLL, SerDes, PLL, compensation circuits, Interface Training modes, Equalization techniques etc..
Experience with circuit design, layout, circuit reliability tools and methodologies.
Working Knowledge of IO Signal-Integrity, Power-delivery, System channel analysis and Post-silicon interface testing

Preferred Qualifications:

Experience with 2D or 3D NAND or PCM non-volatile memory design experience with strong fundamentals in Flash-cell, Semiconductor device physics.
Experience managing and leading small design teams and products. Candidate having ESD design, verification and signal Integrity Analysis experience, expertise is preferred.
Experience working with cross functional teams (product engineering, technology, spec development, architecture, signal integrity, Power-delivery, System channel analysis).
Experience with develop test plans for silicon characterization, document all design work with review materials and detailed design descriptions as well as participate in the writing of datasheets and application notes for customers.

Inside this Business Group

Non-Volatile Solutions Memory Group:  The Non-Volatile Memory Solutions Group is a worldwide organization that delivers NAND flash memory products for use in Solid State Drives (SSDs), portable memory storage devices, digital camera memory cards, and other devices.  The group is responsible for NVM technology design and development, complete Solid State Drive (SSD) system hardware and firmware development, as well as wafer and SSD manufacturing.



Other Locations

US, California, Santa Clara



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

USExperienced HireJR0169891
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