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Job ID: JR0169021
Job Category: Engineering
Primary Location: Folsom, CA US
Other Locations: US, California, Santa Clara
Job Type: Experienced Hire

IP/SOC Design Methodology Technical Lead

Job Description

Are you passionate about computer graphics? Working in a fast paced, leading edge environment with endless possibilities of innovating and learning, then our Graphics & Throughput Computing Hardware Engineering (GTCHE) Team has an opportunity for you. GTCHE is responsible for the development of the Graphics IPs and Discrete GPU SoCs. The Front-End-Tools, Flows and Methodology (FE-TFM) Team within GTCHE is responsible for providing methodologies for Best in Class RTL development, IP Delivery, SoC Integration, execution and verification. The team develops and deploys these methodologies across all Graphics IPs and SoCs. We are looking for a talented IP/SOC Design Methodology Lead to join our team. In this position, the candidate will work on RTL design, integration and quality checks related flows across clusters, IP, Subsystems and SoCs. The candidate will rapidly take features from concept to production and provide customer support, debug failures and provide out of the box solutions.

Responsibilities include:

  • Understand and enhance the front-end design flows and methodologies across IPs and SoCs to identify key areas of improvement.
  • Provide user friendly solutions to increase productivity of team.
  • Identify, define and publish best practices for the various aspects related to RTL development, IP delivery, SoC integration, quality checks and back-end handoff.

The ideal candidate will have the following skills in addition to the qualifications listed below:

  • Must be a team player, with a demonstrated expertise to technically influence others.
  • Strong problem-solving skills.
  • Excellent verbal and written communication skills.


Minimum skills and experience that will get you noticed:

Bachelor's in Electrical/Electronics/Computer Engineering, Computer Science or related field with 7+ years of industry experience. Or a Master's degree with 5+ years of industry experience.

In addition, the candidate must have experience in the following: 

  • 5+ years in IP, SoC design and/or integration or RTL design experience.
  • 3+ years with SystemVerilog and familiarity with a range of internal and 3rd-party logic design tools
  • 3+ years in FE development flows and tools

Preferred skills and qualifications that will make you stand out:

  • Computer Architecture, Verilog Design, Software skills (C, C++)
  • Experience with Register formats (OSXML, RAL), automation and methodology is a plus

Inside this Business Group

Intel Architecture, Graphics, and Software (IAGS) brings Intel's technical strategy to life. We have embraced the new reality of competing at a product and solution level—not just a transistor one. We take pride in reshaping the status quo and thinking exponentially to achieve what's never been done before. We've also built a culture of continuous learning and persistent leadership that provides opportunities to practice until perfection and filter ambitious ideas into execution.

Other Locations

US, California, Santa Clara

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

USExperienced HireJR0169021
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