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Job ID: JR0167769
Job Category: Intern/Student
Primary Location: Santa Clara, CA US
Other Locations: US, California, Folsom;Virtual US and Canada
Job Type: Intern

Pre-Si Validation Intern

Job Description

Successful candidate will work as an intern with the pre-silicon validation team in Security IP. They will get familiar with the validation life cycle of features, and the environment used to validate security features. They will get an exposure to how test plans are created, executed, running simulation models, and analyzing and using results to modify testing.

Responsibilities may be quite diverse of a nonexempt technical nature. U.S. experience and education requirements will vary significantly depending on the unique needs of the job. Job assignments are usually for the summer or for short periods during breaks from school.

Responsibilities will include but not be limited to:

  • Working on automation in the validation environment to accelerate debug efficiency
  • Familiarizing with validation environment of one of the security IP blocks and enhancing test content
  • Learning validation tools for developing and running test content and coverage
  • Interacting with peer validation team and learning strong validation practices

In addition to the qualifications listed below, the ideal candidate will also have:

  • Engineering problem solving and analytical skills
  • Excellent verbal and written communication skills
  • Willingness to work well in a team environment


You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences.

Minimum Qualifications:

The candidate must be pursuing a Master's degree in Electrical or Computer Engineering.

3+ months of experience in:

  • Programming languages such as TCL Perl and Python
  • Basic electronic circuit functionality and behaviors passive and active circuit structures
  • Have working knowledge of Complementary Metal Oxide Semiconductor CMOS and Very Large Scale Integration VLSI component design principles

Preferred Qualifications:

  • Course work or projects or experience¬†using¬†Verilog, OVM/UVM

Inside this Business Group

The Design Engineering Group is a worldwide team responsible for the design, development, validation, and manufacturing of IPs and SOCs. Our mission is to deliver leadership products through groundbreaking innovations.

Other Locations

US, California, Folsom;Virtual US and Canada

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Annual Salary Range for jobs which could be performed in US, Colorado:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here
Intel is committed to a culture of accessibility.  Intel provides accommodations to applicants and employees with disabilities.  Find information and request accommodation here.
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