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Job ID: JR0166485
Job Category: Engineering
Primary Location: Hillsboro, OR US
Other Locations: US, California, Santa Clara;US, Texas, Austin
Job Type: College Grad

System Memory Validation Engineer

Job Description

As a System Memory Validation Engineer, you will be working as a member of the Server Platform Integration and Validation Engineering (XPIV) team. The team has an exciting opportunity in system memory validation in analog/electrical validation area. We are looking for a proven self-starter who thinks outside of the box to join our cross-geo engineering team validating memory technologies on Intel 's next generation leading edge Server CPUs.

Your responsibilities would include, but are not limited to:

  • Creating, defining, and developing system validation environment and test suites.

  • Use electrical and platform level tools and techniques to ensure performance to spec.

  • Contribute in the areas of System Marginality Validation, System I/O Circuit Validation, and data collection and analysis.

  • Develop test equipment automation scripts to support the development of methodologies to improve post-silicon test content, execution of validation plans, and debug of failure.

  • Development of methodologies, execution of memory validation plans, and debug of failures.

  • Interface with Architecture, Design, and Validation teams to review and address memory related debug.

  • Engage with XPIV partner organization in debug of complex system level problems, developing validation methods and test content, and presenting validation results.

  • Work with multidisciplinary and multicultural teams across the globe to ensure a high quality on the Electrical validation, by way of mitigating risks and working collaborative as a single team on the resolution of the issues.


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Relevant experience can be obtained through schoolwork, classes and project work, internships, and/or work experience.

This position is not eligible for Intel immigration sponsorship.

Education Requirements:

  • Bachelor's degree or higher in Electrical Engineering, Computer Engineering, Computer Science, or closely related field.

Minimum Qualifications:

6 months+ experience in the following areas:

  • Analog circuit design or validation, and/or signal integrity design or validation

  • Programming or scripting languages such as C/C++, Python etc.

  • Use of lab instruments like oscilloscopes, multimeter, etc.

  • Signal integrity and electronic circuit analysis

Preferred Qualifications:

  • Focus on analog circuits in coursework and/or experience

  • Experience in board design and schematic capture design tools.

  • Familiarity with statistics and knowledge of JMP (Jump Software)

Inside this Business Group

The Data Platforms Engineering and Architecture (DPEA) Group invents, designs & builds the world's most critical computing platforms which fuel Intel's most important business and solve the world's most fundamental problems. DPEA enables that data center which is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.



Other Locations

US, California, Santa Clara;US, Texas, Austin



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

USCollege GradJR0166485
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