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Job ID: JR0165278
Job Category: Engineering
Primary Location: Guadalajara, JAL MX
Other Locations:
Job Type: College Grad

Structural Design Engineer

Job Description

Oversees definition, design, verification, and documentation for SoC (System on a Chip) development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs. Contributes to the development of multidimensional designs involving the layout of complex integrated circuits. Performs all aspects of the SoC design flow from highlevel design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing. Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results. May also review vendor capability to support development.

As a CPU Synthesis Engineer your responsibilities include:
Synthesis and Place and Route using industry standard tools for high speed CPU core design
Perform all aspects of design flow from logic, synthesis, place and route, FEV power timing, quality checks, and design closure
Develop strategies to deliver reproducible design convergence results
Help to create and refine synthesis flow for the project team
Develop and recommend better design method practices to enable better synthesis convergence

The ideal candidate will exhibit behavioral traits:
Willingness to work with others in a highly complex decision space
Skilled at developing an implementation plan, monitoring key indicators, communicating resource-needs, and scoping risk to deliver value on schedule
Excellent verbal and written communication and collaboration skills


You must possess the below minimum qualifications to be initially considered for this position Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork classes research andor relevant previous job andor internship experiences.

Minimum Qualifications
Intermediate to Advanced English Level

Candidate must have Bachelor's in Computer Engineering, Electrical Engineering, or related field of study with 3+ years of experience (experience can be offset by master’s or PhD degree) in the following fields:
- Integrated circuit design tools ex Synopsys Cadence including logic synthesis place and route static timing analysis and design closure
- Synthesis of a digital logic block which was integrated into a large SoC or IP
- PV convergence including static timing and power analysis
- Scripting in an interpreted language TCL and 1 or more of the following Perl Python Ruby etc

Preferred Qualifications
Experience with:
- Knowledge in Unix/Linux operating systems
- Knowledge of CAD physical design software

Inside this Business Group

The Devices Development Group (DDG) is a global organization focused on the development and integration of SOCs, critical IPs including Atom and chipsets that power Intel's leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.

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