Provide technical oversight and management for Power and Performance Characterization and volume validation efforts for current and upcoming Intel Data Center products.
Create, define and develop system validation environment and test suites. Use and apply platform level tools and techniques to ensure power, thermal, and performance are to spec.
Responsible for the development of methodologies, execution of validation plans, and debug of failures. Requires deep understanding of Architecture and Design with the objective of partnering with pre-Si to improve post-silicon test content.
Develop and communicate test plans, execution, monitoring status, issues/risks and concerns to appropriate forums, stakeholders including architecture, design, and upper management.
Active involvement in technical discussions and collaboration with functional validation hardware teams and SW/FW teams for dependency tracking and root cause of complex issues.
Front line engineering lead, driving schedules and customer issues to closure. Responsible for program level risk assessments and customer deliverable for power, thermal and performance validation items.
Strong project engineering skills, including ability to clearly communicate task breakdowns, track progress against plan, communicate roadblocks and negotiate mitigations. Needs to have experience negotiating scope and technical risk to meet deadlines.
Ideal candidate must possess either a Bachelor's degree with 12+ years of experience or a Master's degree with 10+ years of experience in Electrical Engineering or Computer Engineering.
The candidate should have the corresponding years of experience in the following:
Leading post-silicon validation activities using test equipment, computer systems or test stations.
Driving software development automation efforts, including experience with scripting languages such as Python, C/C++ and/or Perl.
Strong fundamentals in power/performance architecture and tuning including cache coherency protocols, prefetcher tuning and performance bottleneck analysis using EMON or Performance Counter monitors.
Strong understanding of power/thermal (Cdyn, FIVR, thermal margin) and power management flows (Pkg C, P-States) and tuning of Code.
High speed IO bus (PCIe Gen 4/5) protocol experience is plus
Familiarity with server and client-specific industry benchmarks and their application to measurement and competitive analyses of performance KPI's.
Must be able to analyze and drive performance and power sightings to closure across multiple PnP domains in collaboration with cross-functional leads.
The everyday contributions of the Intel Validation Engineering (iVE) team are essential to retaining/regaining Intel's product leadership. We validate, debug, and tune the newest designs and world-changing technologies that enrich the lives of every person on earth. We play a critical role in completing the PRQs of Intel products and in Intel's ability to deliver the annual technology platforms in our roadmap.