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Job ID: JR0162051
Job Category: Engineering
Primary Location: Hillsboro, OR US
Other Locations: US, California, Santa Clara;US, Texas, Austin
Job Type: Experienced Hire

CAD Engineer Digital Verification

Job Description

As part of the front end team, you will be critical to the future success of Intel's SoC products. Intel's Front-End CAD is a research and development team that develops and delivers solutions (TFMs: Tools, Flows, Methods) for complete front end verification system including functional and formal verification, coverage methodology and hybrid simulation environments that are critical to enabling SW/HW co-design and accelerate time to market for our SoCs.

As part of this team, you will be developing and supporting CAD software engineering flows, tools and methods, assessing architecture and hardware limitations, planning technical projects in the design and development of CAD software, and defining and selecting new approaches and implementation of CAD software. Frontend-CAD is a highly exciting and challenging environment. We are exposed to a broad scope of mission critical SoC and IP challenges and are looking for qualified engineers with several soft skills including:

  • Willingness to support design teams
  • Willingness to act as ambassador for new technologies and actively engage with global cross-site teams
  • Willingness to work with others to both receive and provide technical coaching
  • Excellent communication and presentation skills
  • Willingness to prioritize, manage risks, evaluate tradeoffs, make quick decisions and communicate task status
  • Willingness to interface with multiple customers, understand their requirements, set expectations and deliver on commitments
  • Analytical problem solving, team oriented and work in a collaborative environment


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:


The candidate must have a Bachelor's degree in Computer Science, Electronics or Electrical Engineering, or Computer Engineering or related disciplines and 3+ years of experience -OR- a Master's degree in Computer Science, Electronics or Electrical Engineering, or Computer Engineering or related disciplines and 2+ years of experience with:

  • Logic/RTL design using Verilog, System Verilog, UVM
  • ASIC verification tools such as VCS logic simulator
  • Front End domains Simulation, formal property verification and Validation
  • Linux/Unix
  • Software development: Perl, Python, or Shell scripting
  • Source control management tools (e.g. GIT)


Preferred Qualifications:

  • Basic knowledge in MachineLearning

Inside this Business Group

The Product Enablement Solutions Group (PESG) is a worldwide organization that delivers an end-to-end design system for development of IPs, Cores and SOCs. This business group partners with the Semiconductor, IP and EDA eco-systems and leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to deliver a world-class design system that powers Intel’s leadership products.



Other Locations

US, California, Santa Clara;US, Texas, Austin



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

USExperienced HireJR0162051
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