Creates, defines and develops system validation environment and test suites. Uses and applies emulation and platformlevel tools and techniques to ensure performance to spec. Responsible for the development of methodologies, execution of validation plans, and debug of failures. Requires broad understanding of multiple system areas and requires interfaces with Architecture, Design, and Presilicon Validation teams in improving postsilicon test content and providing feedback for future ondie debug features.
� Bachelor's/Master's in Electrical/Electronic Engineering or Computer Engineering or Computer Science with minimum 3 years to 6 years for System Validation of related work experience.
� Must have microarchitecture experience in CPU/SoC/Chipset
� Knowledge of IA/ARM core and system level Power Management architecture and flows, who familiar in Pcode and PMC features, Chip level power management transition states etc. Understanding of System Reset flows and Thermal related Validation expertise is a plus.
� Solid understanding of the Validation and Debug flows of a complex CPU Silicon:
� Knowledge on Validation/ Debug Flows and overall SOC Architecture.
� Pre-silicon Design / Validation knowledge is a value add.
� Good working knowledge in C++/Python SW programming for content development and scripting.
� Knowledge of Verilog/VHDL and EDA design tools and pre si validation methodology is a plus.
� Excellent written and oral communications and experience working in a cross functional team environment are essential
� Good Team player
� Strong problem solving, analytical and debug skills.
The Design Engineering Group is a worldwide team responsible for the design, development, validation, and manufacturing of IPs and SOCs. Our mission is to deliver leadership products through groundbreaking innovations.