In this position, you will be involving in the training, design and development of next generation Server SOCs/CPUs. Your responsibilities will include some of the following but not limited to: - Assist design unit owner in Register Transfer Level (RTL) modeling & functional validation. Use EDA tools extensively to simulate logic behavior and circuit performance and direction of physical design for next generation, deep sub-micron embedded circuit solutions. Verify the circuit behavior against the original simulation model and first silicon. - Define VLSI Structural Design methodology and developing design flows. Implement structural physical designs, such as synthesis, floor planning, power-grid and clock tree designs, timing budgeting and closure, place and route, RC-extraction and integration. Verify structural physical designs, such as functional equivalency, timing/performance, noise, layout design rules, reliability and power.
You should be a student (Post graduate/Masters - ME/MTech/MS) currently pursuing studies in relevant field with good understanding of semiconductor physics and basic PC computer architecture. Additional qualifications include:
- Familiarity with Very Large Scale Integration (VLSI) Complementary Metal-Oxide Semiconductor (CMOS) logic circuit design
- Well versed in UNIX*, C programming and relevant Computer Aided Design (CAD) tools
Xeon Performance Group (XPG) delivers custom server SoC design solutions to our data center customers. It is chartered to deliver data centric silicon that is high-performing, cost-effective, high-quality, and on schedule in way that increases market share and drives the best solutions for our customers.