In this role, the applicant would be responsible for ensuring Ethernet Platform Group (EPG) silicon products receive an appropriate level of focus and execution contributing to the eventual Ethernet I/O solutions that meet our customers' electrical performance and interoperability expectations.
The candidate would plan, provide direction for and implement solutions in engineering functions to meet schedules, standards, and cost.
You'll be a team leader and a technical contributor in the Revenue System team and will be responsible for managing the team, the definition and implementation of solutions for Ethernet systems.
This EPG Link Management System Engineer position is within EPG's silicon engineering development department. The Ethernet Products Group products span many technologies including SoC, Ethernet controllers, including physical I/O technologies: 10M/100M/1G/2.5G/5G/10G BASE-T and HSS Ethernet 10G/40G/100G serial technologies.
In this position, your responsibilities will include, but not be limited to:
Managing a team of Link Management expert Write architectural requirements and define flows that are necessary for the integration of IP into SOC. (Deeply involved in the following fields FW/SW Tools/NVM and debugging issues in sub-system) Define algorithms for PHY IP where needed Define and code automated Post-Si tests for validating the IP. Characterize IPs in standalone and full-chip and perform results analysis
Applicants should possess a Bachelor of Science degree (or higher) in Electrical/Computer Engineering, with 6+ or more years of people management and relevant experience in electronics design or validation, combined engineering.
Required skills and experience include:
1. Management skills – Teamwork, Leadership, Entrepreneurship , Conflict management, Negotiation, Strategic thinking, Project management, Time management. 2. People management - Coaching skills, people growth mindset
3. Quality management
4. Results driven
5. Write architectural requirements and define flows that are necessary for the integration of IP into SOC. (Deeply involved in the following fields FW/SW Tools/NVM/Pre-Si verification and debugging issues in sub-system)
6. Define algorithms for PHY IP where needed
7. Define and code automated Pre-Si and Post-Si tests for validating the IP.
8. Characterize IPs in standalone and full-chip and perform results analysis
9. Working knowledge of statistics and statistical analysis tools
10. Excellent communication and negotiation skills and along with a proven track record for being a team player focused on common goals
11. Ability to use advanced test and measurement lab equipment (oscilloscopes, analyzers) to debug circuit boards
12.Strong project management and organizational skills, with a track record for delivering a set of objectives on schedule and within budget
Additional, desired skills and experience:
1. Familiarity with PHY Ethernet protocols Knowledge in python scripting
2. Knowledge of Linux Software development skills in C, C++, and TCL are desired
3. Solid understanding of SW development flows including architecture trade-offs and implementation dependencies for different code environments
4. Ability to work and contribute in a cross-functional product teamInside this Business Group
The Data Center Group (DCG) is at the heart of Intel’s transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.
Israel, Haifa;Israel, Petah-Tikva