- Innovate and Design of mixed-signal circuits such as High-Speed Transmitters and Receivers, equalization circuitry, DLL, Clock distribution from logic to analog domain, on die voltage regulators, Circuit Compensation Blocks and Voltage references blocks to meet architectural specifications
- Own design verification plans covering functionality, performance and reliability meeting high volume productization requirement
- Participate in circuit design review and work with Mask Designers on layout implementation and reviews
- Collaborate with design engineers of other disciple on integration of the analog circuit to the DDR PHY
- Mentoring of junior engineer
Qualifications
- Proven track record on design of high-speed analog and mixed-signal design, architecture, system and integration aspects for DDR PHYs
- Good Understanding of to GDDR/DDR JEDEC specifications and related DDR Protocols
- Good understanding of design for yield and exposure to production challenges in latest technology process node
- Experience with industry standard tools for Analog design such as Cadence ADE, Spectre, AMS verification, FEV, StarRC etc.
- Cross-discipline knowledge in any of these areas, such as Analog integration, RTL/System Verilog, Static timing analysis concepts, APR, Floor-planning, Metal-routing, Power-grid, Memory IO training MRC and HAS/MAS specification documentation
- Strong written and oral communication skills
- BSEE with 10+ years relevant experience or Master's with 7+ years relevant experience required. Education Focus should include integrated circuit design and analog design
Inside this Business GroupIntel Architecture, Graphics, and Software (IAGS) brings Intel's technical strategy to life. We have embraced the new reality of competing at a product and solution level—not just a transistor one. We take pride in reshaping the status quo and thinking exponentially to achieve what's never been done before. We've also built a culture of continuous learning and persistent leadership that provides opportunities to practice until perfection and filter ambitious ideas into execution.
