Testchip Architect

Job Description
Define hardware architecture and IP integration strategy Architect connectivity solutions for IP interfaces including clocking bridging gasket speed bridges and other logic blocks to support IP integration and testing Drive new tools flows and methods for architecture and design enablement Write precise testchip spec and support design teams in design and verification Define package bench and tester testing requirements

Qualifications

BS or higher degree in electrical engineering
8 years of architecture design andor verification experience
Good understanding of general SOC architecture
Prior experience designing new architecture
Hands on knowledge of SOC fabric DMA flow control and IO interfaces such as PCIe USB MIPI AMBA etc
Good integration knowledge of analog circuits and mixed signal designs
Good knowledge of designfortest techniques
Good knowledge of system architecture esp HWSW architectures
Good analytical and communication skills in both written and verbal
Knowledge of Auto PR Primetime System CVerilog postsilicon testing etc are a plus

Inside this Business Group

IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.