XEON & Networking Engineering( XNE) team is looking to hire a Pre-Silicon Validation Engineer to their team. In this role your responsibilities will include, although not limited to:
Lead the Pre-Si validation in various functional areas of a SOC or IP
Define Pre-Si validation plans, leveraging various validation platforms including but not limited to Simulation and FPGA
Develop test bench infrastructure and validation content
Coordinate with other team members to align on expectations and dependencies for deliverables
Collaborate with design and architecture teams to align on feature scoping, staging of feature development, and validation coverage
Colorado Pay Transparency Law requires that Intel discloses the compensation for jobs which could be performed in Colorado. Intel anticipates that the annual base pay range for this role in Colorado is $ 111,000.00 - $ 166,390.00. In addition to base pay, regular Intel employees are eligible for an Annual Performance Bonus (“APB”) and Quarterly Profit Bonus (“QPB”). Payout of APB is subject to eligibility and other program conditions as well as the Company’s performance to its operational and financial goals. Payout of QPB connects Intel’s employees to the quarterly profits of the Company. Employees in eligible sales and marketing positions receive commission in lieu of APB but are eligible for QPB. Information about these bonus programs as well as the host of expansive stock, health, retirement and vacation benefits offered to Intel employees are available at: https://www.intel.com/content/www/us/en/jobs/benefits.html. Interns and Intel Contract Employees are not eligible for APB or QPB or for some employee benefits including, but not limited to, disability, life insurance, retirement, equity and certain leave programs.
Candidate must possess the minimum qualifications to be considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Candidate must have Bachelor’s degree in Computer or Electrical Engineering or related field with 4+ years of industry experience - OR - a Master’s degree in Computer or Electrical Engineering or related field with 3+ years of industry experience.
Your experience should be in the following:
RTL design validation experience including developing unit or system level test benches and test plan creation
Developing test bench components such as monitors, scoreboard/checkers, and bus functional models (BFMs)
Proficient in HDL such as Verilog/OVM (and/or UVM)/System Verilog
Problem solving and debugging skills
Experience with Security validation
Experience with Embedded Software/Firmware (C/C++)
Experience with validating CPU based flows
Familiarity with hardware design flows (EDA) and tools: CDC, Lint, Synthesis, Logic Equivalence Checking, Timing
Experience with developing FPGA and Emulation-based validation platforms
Xeon and Networking Engineering (XNE) focuses on the development and integration of XEON and Networking SOC's and critical IP's sustain Intels Xeon and 5G networking roadmap.
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.