Inside this Business Group
Lead synthesis and timing closure activities of complex ASICs for Programmable solutions Group
Good understanding of RTL/IP integration concepts, constraints, UPF, Synthesis methodology, Linting, Equivalence checking. Should understand the full physical implementation flow - expertise in timing closure
Solid analytical and problem solving skills - hands on expertise in running synthesis, timing tools.
Masters degree in Engineering with minimum 15 years of relevant experience
The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.