Candidate will be providing technical leadership to one or more physical design and sign-off automation tools/flows and methodology
1. Candidate need to be B.Tech/M.Tech/Ph.d with 10+ years of experience in EDA/CAD and/or physical design and sign-off
2. Good communication, interpersonal and leadership skills
3. Expert in Physical design tools/flows and methodology in one or more domains like Synthesis, P&R, STA, Formal, Layout and reliability verification
4. Expert in Industry tools like ICC2, PT, Red-hawk, ICV/Calibre, Formality/Conformal
5. Good programming skills in C/C++ or scripting language perl/TCL/Python
The Infrastructure and Platform Solutions Group (IPSG) builds the silicon and platform infrastructure for Intel's silicon design teams. IPSG is comprised of a reusable pool of infrastructure IP blocks, design enabling services such as tools and automation, and a best-in-class post silicon ecosystem that ramps quickly to high volume manufacturing and validation. Our primary mission is to protect Intel's brand by providing the infrastructure necessary to enable all of Intel's products to hit the market on a dependable and predictable cadence.