Ready to make the world's best products better?
Join a dynamic team that sets the direction and guides our development teams to enable world class products
You will be responsible for identifying, investigating, and driving resolution of product related yield, parametric and BinSplit limiters. You will work with diverse stakeholders across Product Development, Process development, Design, Architecture, Sort and Manufacturing to deliver a capable technology with demonstrated baseline meeting HVM requirements, drive and track improvement roadmaps.
Within this framework, you will Lead and run data analyses with impact over Intel Design, test and process while defining the product roadmap.
You will lead strategic Work groups, composed of Engineers and managers from several teams and work on Intel's power binning algorithm.
You should have strong engineering data collection capabilities, data extraction tool knowledge and ability to perform data analysis with excel/JMP, based on statistic and modelling, power modeling etc.
The Infrastructure and Platform Solutions Group (IPSG) builds the silicon and platform infrastructure for Intel's silicon design teams. IPSG is comprised of a reusable pool of infrastructure IP blocks, design enabling services such as tools and automation, and a best-in-class post silicon ecosystem that ramps quickly to high volume manufacturing and validation. Our primary mission is to protect Intel's brand by providing the infrastructure necessary to enable all of Intel's products to hit the market on a dependable and predictable cadence.