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Job ID: JR0117210
Job Category: Engineering
Primary Location: Petach-Tiqwa, IL
Other Locations:
Job Type: College Grad

Power Management Front End (RTL) Design

Job Description

Job Description
Who Are We?
Position is for FrontEnd design engineer in Power Management design team of the client microprocessors group (C2DG).
What Will You Do?
� Power Management Design team is responsible for development of SOC Power/Performance features, Reset and IPs Integration to SOC.
� You will be responsible on Pre Si definitions, RTL implementation, enabling and integration of power management features. You will work with many IPs and SOC teams, as well as close work with Firmware/Software components which participate in feature implementation.
� The team also takes important role in Si activities - Reset Enabling, Debug, Power optimizations.


What are we looking for?
� B.Sc. in Electrical or Computer Engineering is required.
� Knowledge and Experience in the following circuit design fields is an advantage: RTL Coding and Design, Pre Si Validation.

Inside this Business Group

The Silicon Engineering Group is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs that power Intel’s leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.

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