Performs logic design, Register Transfer Level (RTL) coding, and simulation to generate cell libraries, functional units, and subsystems for inclusion in full chip designs. Participates in the development of Architecture and Microarchitecture specifications for the Logic components. Provides IP integration support to SoC customers and represents RTL team.
-Bachelors or Master's degree in EE, CE or CS, or equivalent Familiarity or experience in RTL design with Verilog and/or VHDL is required.
-Familiarity or experience with RTL verification and timing analysis/closure on Linux/UNIX platforms is a strong plus.
-Knowledge of high speed serial system interfaces such as DDR, Ethernet, IEEE 1588, CPRI or Serial Rapid IO is a strong plus.
-Familiarity with Perl, C++, Java and shell scripts is a plus. Strong skills in communication, initiative, promote innovation and teamwork.
-Highly motivated to learn and adapt to fast-changing technologies and environments.
-Demonstrates fundamental values such as accountability, integrity and a winning mindset
The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.