Inside this Business Group
The applicant should have Bachelor degree in (Electrical & Electronics or Computer or equivalent) Engineering. Graduates with experience in RTL design and verification are encouraged to apply.
- Experience in System Verilog, OVM, UVM, RTL model build or testbench development.
- Capable in developing test plans, test contents and coverage points for verification purpose based on high level architecture specification.
- Strong analyzing and debugging skills, and creative in problem solving.
- Strong programming skill in Perl, C++ and shell scripts.
- Good communication skill.
- Highly motivated to learn and adapt to fast-evolving technologies and environments.