Physical Design Intern
In this internship you will be working alongside a World-class SoC System on a Chip design team within the Xeon Performance CPU Development Group delivering next-generation Xeon products and related IPs for Server markets.
Responsibilities could include but not limited to
-Working in the SOC physical Integration team, planning high speed clock distribution for a SOC.
Perform hierarchical design planning, routing studies and implementation of complex integrated circuits and blocks
- Logic synthesis of design blocks, Formal Equivalence Verification FEV
- Auto Place-and-Route APR using Synopsys ICC tools
Inside this Business Group
Pursuing BS or MS degree in Electrical Engineering, Computer Engineering or other related field of study
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance....