Inside this Business Group
You will be responsible to deliver a good quality layout which includes the following:
- Working with the circuit design team to plan and schedule work as needed to build a complex analog layout with Intel latest process nodes.
- Running complete sets of design verification tools and completely understanding the LV, RV, ESD, DFM, and other reports.
- Finding the fastest way to complete the layout that meets the stringent matching, performance area, and power requirements.
- Implementing ECO and LCO to meet the design specification and having the ability to create schematics to debug issues/test cases.
- On time delivery to the project schedule without compromise to the layout quality is always the top priority.
Soft skills or people skills are the personal attributes will be needed to succeed in the workplace. You will also be responsible to enhance your soft skills along the way.
This includes the following:
- You are expected to participate in DDG self-development activities that allows you to enhance your communication such as listening and presentation skills.
- You are also expected to be able to accept and apply feedback from others.
- Work well with local teams or with other team cross-site.
Required Skills and Experience
- Required 3+ years' experience in deep SubMicron analog layout design.
- Experience building tight matching, low capacitance, low power analog blocks, resistors, capacitors, high voltage devices, pad IOs, ESD structures, etc.
- Proficient experience with custom and standard cell based floor planning and hierarchical layout assembly.
- Deep understanding of IR drop, RC delay, electro-migration, self-heating and cross capacitance.
- Experience with analog and DFM practices.
- High-level proficiency in interpretation of UNIX environment, Genesys, Calibre, DRC, ERC, LVS, etc. reports.
- Scripting experience in PERL, TCL, Unix or SKILL CODE is considered a plus.