Staff SOC Design Engineer
In this position candidate will be part of R&D team who design and develop the Chipset and SOC IP for Intel latest product. Apart from performing SOC Front End related activities ranging from Fullchip RTL development, integration to verification using state of the art tools and methodology; candidate also has the opportunity to drive for methodology and technology enhancements that spans across multiple geographies.
Specific responsibilities include but not limited to:
- Involving in RTL logic/testbench/verification environment design (in System Verilog, Verilog or other Hardware description language) and integration
- Involving in capabilities building within and outside the SOC Front End team
- Validating the functionality of new architectural features of next generation designs by developing testplans, tests content, coverage points or test tools
Inside this Business Group
Candidate should have Bachelor/Masters degree in relevant field. (Electrical & Electronics or Computer System). At least several years of experience in Front End development or related areas.
Knowledge in RTL integration and validation methodologies is a plus. Possesses strong analytical and debug skills. Ability to communicate well with counterparts and key stakeholders including cross site partners.