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Job ID: JR0085110
Job Category: Engineering
Primary Location: Bangalore, KA IN
Other Locations:
Job Type: Experienced Hire

Graphics Post Silicon Validation Manager

Job Description

The candidate will be part of the Visual and Parallel Computing Group (VPG) , Graphics Hardware System Validation team (Bangalore), working on Validation and Debug of Next Generation Graphics IP. In this role, you will need drive the validation and debug strategy and methodology to establish the next level of excellence in post-silicon validation. Candidate also be required to provide architectural and technical guidance, drive industry standard graphics validation Methodologies, driving execution efficiency, accelerate post-silicon validation cycles, influencing DFD/DFX Architecture to improvise the debug TPTs in post-silicon, Candidate need to work closely with VTT program Management Teams, SOC Validation, MVE, EV, Tools, Design, Mfg, Platform and other partner organization to come up with E2E product validation strategy. Candidate needs to provide direction and goals to the team and interacts with stakeholders both internal and external.

As a Manager of the team, Set priorities for the team, get results across boundaries, ensure an inclusive work environment, develop employees, and manage performance. Manages a team of hardware validation engineers. Should be able to quickly align with Org deliverables, effectively plan and execute to the plans by managing the risks and working thru dependencies. The candidate has to nurture innovation and be a change agent, role models assumed responsibility result orientation.


Qualifications

Qualifications / Responsibilities
- Master or Bachelor of Engineering degree in Electronics or Computer Engineering with 12-15 years' experience in graphics platform setup, post-silicon functional validation/performance, and power measurements, Should have understanding of Computer architecture, microcontroller/microprocessor and/or graphics architecture/design , Experience with industry standard automation and scripting (C/C++/Shell programming/PERL/Python), Experience with the lab hardware equipment like DAQ, Logic Analyzer/O-scope/Emulators/FPGA cards and associated interfaces required to validate graphics, Media and Display. Good analytical ability, problem solving and communication skills
- Self-Driven and a passion for continuous improvement of validation methodologies debug techniques.
- Demonstrated skills for Project planning for post-silicon from Power On to PRQ and Post-launch Support
- Understand the Product Lifecycle's and various phases of validation from Simulation/Emulation to Post Silicon
- Ability to drive Post Silicon Sys-debug, Own Debug task forces and Chair Virtual Work Groups to enable the mega/Complex features
- Sound knowledge of Graphics/Media and Display OR Design For Debug methods
- Ability to Define/Drive test scenarios, write test cases, validate system level new features, regressions execution, track/analyze failures and debug.
- Review bugs, retrospective of bug escapes and propose methods to catch bugs early
- Analyze impact on performance/power and drive the fixes/workarounds as per project milestone priorities
- Understand usage models (driver) and bring in scenarios early in emulation to validate to minimize escapes
- Support SW driver/WHQL/benchmarks / media workloads/ Display Compliance test suites failure debug
Responsible for Post-Si validation of Intel internal Graphics Cores (3D , Media, Power Mgmt and Display).
Own, scope and drive the development of post-silicon verification test plans for units in Gfx Pipeline
Collaboratively work with the partner teams from design Software , platform to quickly root cause the test failures
Independently work with architects/designers/pre-si validation/tech leads/SW driver team/SW-simulation/Emulation teams in driving the test plan reviews, and bug fixes to closure.
Interface with cross-site functional teams in different time zones to drive the validation.
Mentor and guide junior engineers in writing test cases, executing test plans. Provide direction on debug both in emulation and post-Si
Track the progress of quality/coverage goals. Provide periodic updates to program management on progress and escalate issues on time
Driver improvements/efficiencies in validation. Write technical papers for internal/external technical conferences

Inside this Business Group

The Core and Visual Computing Group (CVCG) is responsible for the architecture, design and development of the CPU core and visual technology IPs that are central to Intel's system-on-a-chip (SoC) products and key to our datacenter, client and Internet-of-Things (IOT) platforms. CVCG strives to lead the industry through continuous innovation and world class engineering.

INExperienced HireJR0085110
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