In this position, the candidate will be responsible for verification of soft IP cores for Intel's next generation chips (including SOCs) for the different market segments.
Verification Lead will be responsible for the execution and quality verification sign-off and interact with Performance , Power and SOC verification team.
Master of Science (or a Master of Technology) degree in Electrical Engineering with more than 7 years of relevant industry experience or a Bachelor of Science (Bachelor of Technology) degree in Electrical Engineering with more than nine years of relevant industry experience.
- Experience : Relevant ASIC design/validation experience in front end processes including RTL functional, performance and power verification
- Expertise in verification of design blocks (IP) for system-on-chip (SoC) components
- Expertise in system verilog, and/ OVM or UVM based verification methodologies
- Experience in OOP concepts, coverage based random validation
- Experience in one/more of the following areas PCIe, USB, DP
- Knowledge of scripting, SVA , UPF validation
- Knowledge of IO interconnect , memory controllers, CPU architecture is a plus
- Knowledge of considerations for performance, power and cost optimization is desirable
- Expected to be thorough with general verification concepts with System Verilog/OVM/UVM
- Writing test cases and making scoreboard/infrastructure changes to the environment
- Ownership/coding/enhancement of functional scoreboards/agents/sequences/monitors
- Responsible for understanding architecture spec and deriving test cases / testplans
- Need to be a key team player, while being highly energetic and motivated, independent and self-driven (with minimal mentoring/hand-holding)
- Expected to help/drive in throughput test case setup/analysis/report of the DUT
- Expected to define functional coverage/code/hit it through sequence enhancement and newer/directed test cases.