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Job ID: JR0037852
Job Category: Engineering
Primary Location: Austin, TX US
Other Locations: US, Texas, Austin;
Job Type:

Sr. Analog Mixed Signal Design Engineer

Job Description

Intel is in the midst of an exciting transformation, with a vision to create and extend computing technology to connect and enrich the lives of every person on Earth.

So join us - and help us create the next generation of wireless technologies that will shape the future for decades to come. Intel invites you to collaborate with global teams to develop and specify the concepts of cellular wireless modem signal processing algorithms and architectures for various technologies 3G, LTE and upcoming 5G

We are looking for a senior Analogue Mixed Signal Design Engineer strengthening the modem Hardware Mixed Signal Analogue team.

Our solutions are used in world-class tablets, smartphones, feature-phones, and wireless modules.

This job opening encompasses a wide range of activities: 

  • Exploration of novel low power Analog Mixed Signal IP blocks for Modem System On chip
  • Contributing the Intel's Mixed Signal / Analogue  IP port-folio
  • Continuously improve, Assessing and improving the Performance of the IP blocks in terms of Power and Areas
  • Providing specifications of  those IP blocks
  • Providing architecture, micro architecture and design
  • Providing Behavioral model.
  • Working and collaboration with cross-functional teams for successful integration of those blocks in the System on Chip as well as meeting all quality requirement for the market addressed by our chips.
  • Closely collaborate with HW System On Chip teams and FW implementation teams
  • Working along & incorporating up-to-date engineering standards


Masters degree required in Electrical engineering

  • 7+ years of industry experience in Analog / Mixed Signal low power  blocks such as PLL ( analogue and /or digital) , DLL, Bandgap, Voltage regulators, ADC, DAC, Crystal oscillators.
  • 5+ years of industry experience in high speed analog/rf/mix signal low power design, including Gigabits Serdes and Transceivers 
  • Excellent knowledge in CMOS technology.
  • Experience in Cadence development suite cad tools (virtuoso).
  • Experience in Modeling language (Verilog, Verilog A), matlab, unix, scripting
  • Team-player
  • Self-driven and entrepreneurial way of working
  • Excellent communication skills

Preferred Skills:

PhD and/or equivalent working experience preferred

Experience with FinFet technology



Inside this Business Group

Intel is one of the largest suppliers of chips for the communications market. The Intel Communications group is focused on designing and building communications technologies such as Ethernet connectivity products, optical components, communications processing solutions and broadband products.

Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.
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