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Job ID: JR0039437
Job Category: Engineering
Primary Location: San Jose, CA US
Other Locations: US, California, San Jose;
Job Type:

SOC Design Engineer

Job Description

Minimum qualifications:

- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering or a related field

- 10 + years Verilog and/or SystemVerilog experience

- 10 + years ASIC development experience

- Experience with PCI Express interface protocol

Preferred Qualifications:

- 2 + years FPGA development experience using Intel/Altera Quartus II software or Xilinx Vivado

- Experience with scripting languages such as TCL, Perl, or Python


Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.

Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.
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