The Programmable IP Engineering group is responsible for High Speed Protocol IP development, which includes participating in high-level product specifications, logic/RTL design and implementation, RTL verification, IP FPGA emulation prototyping, validation and debugging.
As an IP Design Engineer focusing on IP Verification & Validation, you will be responsible for carrying out design validation for Intel next generation IP’s across the Intel FPGA IP product portfolios. The charter of IP verification & validation team is to verify and validate the IP for robust functionality from functional simulation, FPGA emulation prototyping, to complex system level environment. The verification and validation areas encompass IP’s for external memory interface protocols (eg. DRAM, SRAM) and high-speed transceiver protocols (eg. PCIe, Ethernet, Interlaken, JESD204B, UPI, Serial Lite, Rapid IO, HDMI, DP, SDI ). Your specific responsibilities may include but are not limited to the following:
Inside this Business Group
The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.