We have a challenging position as a DFx design/validation engineer for CDG (Client Development Group) CPU design team. You will be part of the DFx team (Design for testability DFT, manufacturability DFM, debug DFD and validation DFV) and will have an opportunity to influence the way our future CPUs will be tested, validated, and debugged.
In this position you will take part in design and validation of DFx features in one of our future CPUs. Responsibilities will include one or more of the following:
You must possess a Bachelor of Science degree in Electrical Engineering or Computer Engineering and experience with VLSI logic design can be an advantage. Experience in DFT (SCAN, JTAG, BIST, etc.) design or validation is an additional advantage. Additional qualifications include:
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.