Design Engineering Manager - ASIC logic and micro-architecture
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- Manage and provide technical leadership to a team of ASIC logic and micro-architecture design engineers
- Schedule and manage ASIC development, plan and manage resource, tape out quality ASIC designs, validate and productize ASICs as a part of high quality system products.
- Lead development of the ASICs and its subsystems , from concept to product qualification including:
- Participating in determination of overall ASIC and system architecture
- Balancing performance, area, power, complexity, risk and runtime to determine optimal architectures and implementations
- Evaluating, selecting, and integrating third-party IP
- Working with physical design , DFT and pre/post Silicon Verification teams on various issues
- Determining, leading, and executing development, integration, bring up and test plans in coordination with other leads.
- Writing detailed complete internal specifications or Micro Architecture documentation.
- Completing implementation in RTL and evaluating synthesis results for performance and cost
- Ensuring robust and complete timing constraints and evaluating STA results.
- Working closely with verification teams during development
- Working with system and design validation testing teams during bring up and DVT phases.
- Quickly assimilate knowledge, infer consequences, and solve problems before they occur.
Experience/Knowledge in Keywords
Inside this Business Group
- Lead 15 years of relevant design experience, with at least 3-5 years of hands-on technical management.
- Degree in Electrical or Computer Engineering, graduate level or compensating experience.
- Proven success in development and product qualification of complex ASIC, FPGAs and products
- Demonstrated capability to design ASIC, IPs, logic, and FPGAs and drive development from concept to final product.
- Sensitive to tradeoffs involving area, power, design and verification complexity and risk, performance, and the needs of compiler, firmware and runtime teams.
- Ace logic developer. Can do anything in Verilog / SystemVerilog / VHDL.
- Expert in ASIC design flow. Experience with frontend design tools (Incisive/NCSim, RTL Compiler/Design Compiler, STA with ETS/PrimeTime, power analysis); Excellent working knowledge of backend tools.
- Strong technical experience in some major IPs and protocols, such as SERDES, PCIe and DDR4, and ASIC IP integration in general.
- Good understanding of DFT, BIST, other DFx methodologies.
- Knowledgeable with verification methodologies and emulation or prototyping experience helpful.
- Excellent problem-solving and debug skills. Ability looking into IP, firmware, compiler and systems domains as needed.
- Track record of innovation, project planning and execution, and technical management
- Ability to work cross-functionally. Ability to quickly multi-task among many small projects in parallel with major program goals.
- Cannot tolerate to be confined to a small focused role. Driven to understand the big picture. Can easily switch gears and take on new and diverse tasks.
- Proven leadership capabilities. Ability to delegate and empower the team.
- Energetic. Self-driven. Good communication, organization, analytical, presentation and people skills.
The Client Computing Group is responsible for all aspects of the client computing business across Phone, Phablet, Tablet and PC platforms, leading Intel's efforts to transform client computing through technologies, new form factors, and driving Intel's corporate-wide user experience initiatives. This spans all client device brands including hardware, software and connectivity ingredients for phones, tablets, Ultrabook™, All-in-Ones, 2 in 1 computing devices, and home gateways.