The Hardware Engineering of Visual and Parallel Computing Group (VPG) is responsible for the 3D, media, compute & display HW design, development, micro-architecture & validation of current and future processor graphics engines of client platforms (desktop and mobile), servers and low power devices serving consumer and corporate businesses. In this position, you will be responsible for performance and power analysis for the latest display and media technologies including video codecs, video processing, major software interfaces, SDKs, display features. Candidate will be part of a technical team responsible for characterization of future Processor Graphics products. Responsibilities include but not limited to GPU and platform power and performance analysis, identification and analysis of system performance bottlenecks, development of characterization tools and methodology, and quantification of performance/power tradeoffs. This position will focus on bridging display & media architecture expectation, design target, and early silicon development working across multiple teams in silicon enabling and discrepancy resolution.
Successful candidate will work closely with graphics architecture team, and with hardware and software development teams. The candidate should have technical leadership ability, strong problem solving skills, and strong communication skills to interact with various engineering development teams. The candidate should have an understanding in computer architecture and general knowledge of computer system design. Specifically, the candidate must have a good understanding of graphics, media and display technology, processors and microprocessors, memory subsystems, and bus interfaces. A solid understanding in image/video processing and display workloads, software interface, and processor architecture is necessary to successfully design and execute experiments, collect/analyze data on display and/or system level performance as a part of this team. The candidate should have excellent ability to logically organize and clearly present experimental data is a must.
Inside this Business Group
Candidate must possess a minimum of a Master’s Degree in Electrical Engineering, Computer Engineering, Computer Science or a related discipline with 3+ years of related experience. A Ph.D Degree is preferred.
Candidate should have 3+ years of experience with the following:
- Familiar with media & display technologies and imaging processing
- Video codec & video processing technologies
- Knowledgeable about parallel computing, such as thread parallelism (function and/or data partitioning) and data parallelism (SIMD and/or MIMD) and ability to apply them to GPU
- Graphics architecture and hardware development experience
- Graphics/Media/Display software interface, performance benchmarking, Operation Systems
- Scripting/automation experience including PERL, python and batch file scripting
- C/C++ coding experience
- Experience in architecture, design, validation, or software and driver development
- Expertise in video and imaging processing and/or display
- Experience in power management scheme
- Experience with performance tuning & optimizations
- Familiarity with working on Windows, Mac OS, and/or Chrome OS is a plus
- Familiarity with subjective and objective image/video quality assessment methodology and metrics
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.