Control technology changes introduction, monitoring in line defect performance and end of line die yields, finding root cause for in line defect excursion and navigating fix. This is specific to the FPGA product line. Generate and validate binning patterns for effective performance/power product binning. Responsible to meet short and long term product yield targets from a functional, power/performance standpoint.
Inside this Business Group
MS in Electrical/Electronic Engineering
5 years of Binning or Yield Enhancement Experience
Preferred skills include :
1.Expertise in CMT hardware
2.VLSI process technology for deep submicron
3.Performance evaluation and speed / power tradeoffs of large scale integrated circuits
4.Silicon debug skills including failure analysis and fault isolation
5.RTL VHDL or Verilog coding6.Digital design skills
7.ASIC design flows synthesis, place & route & timing analysis, static/dynamic power estimation
8.Programmable logic & FPGA architecture knowledge preferred
The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.