Come and join us! Intel is seeking highly qualified candidates to join our Data Center Group (DCG) team as a Senior Pre-Silicon Design Verification Engineer!
As a Senior Pre-Silicon Design Verification Engineer, you will develop pre-Silicon functional validation tests to verify systems will meet design requirements. You will create test plans for RTL validation, defining and running system simulation models, and finding and implementing corrective measures for failing RTL tests. You will also analyze and use results to modify testing.
Responsibilities will include but are not limited to:
- Develop verification collateral such as behavioral checkers, coverage monitors, test generators or score-boards to enable test plan execution.
- Analyze coverage gaps and devise strategies to fill coverage holes. The quality of the design and the final product is directly proportional to the quality of the design verification work.
- Work closely w/ the Architect/micro-architecture and Design teams in determining the proper validation strategy for new design, defining and provides feedback on TestPlans
- Develop, participate and reviews validation codes for efficiency/coverage and drive any paradigm shifts needed in Validation execution.
In this position you will gain invaluable experience which will allow growth and expanded opportunities within this business group as well as future possible opportunities with other business groups within Intel.
The Data Center Group (DCG) drives new products technologies from high-end co-processors for supercomputers to low-energy systems for enterprise and the cloud, as well as solutions for big data and intelligent devices. The group is a worldwide organization that develops the products and technologies that power nine of every 10 servers sold worldwide.
Inside this Business Group
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Required Qualifications:
Bachelor Degree in Computer Engineering, Electrical Engineering, or related discipline with 4+ years of work experience, Masters in Computer Engineering, Electrical Engineering, or related discipline with 3+ years of work experience, or PhD in Computer Engineering, Electrical Engineering, or related discipline.
- 4+ years of experience in a relevant Pre-Silicon validation position and must have gone through multiple project cycles to gather in-depth experience.
- 4 plus years of experience in logic design/verification with various tools and methodologies including: System Verilog, Perl, OVM/UVM, VCS/synopsys simulators, Coverage Tools.
- 3 plus years of experience in IP or SOC verification of memory controllers, cache coherent fabric, transactional based interconnects, or RTL designs of similar complexity.
- 3 plus years of experience creating or maintaining agents, scoreboard checkers, constrained random test sequences, and/or functional coverage buckets.
Additional Preferred Qualifications:
- Master’s Degree or higher is preferred.
- Experience in Java, C, C++ is a plus.
- Excellent written and verbal communication skills.