Develop process and methodology to qualify the timing models for the FPGA products. Responsible for analysis of FPGA circuits and timing paths. Generate and validate patterns to characterize critical timing paths on silicon characterization of FPGA timing paths to meet product rollout targets. Conduct statistical analysis of silicon data to guide accurate model adjustments. Responsible for rollout of accurate timing models that maximize timing performance under aggressive timelines. Utilize experience in RTL, synthesis & STA tools silicon debug skills and understanding of circuit fundamentals and VLSI processes.
Inside this Business Group
- MS in Electrical Engineering
- 5-7 years of Product Engineering Experience
- RTL VHDL or Verilog coding
- Digital Design
- ASIC Design Flows Synthesis
- Place & Route & Timing Analysis
- VLSI process technology for deep submicron
- Performance evaluation and speed / power tradeoffs of large scale integrated circuits
- Programmable logic & FPGA architecture knowledge preferred
The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.