The Ethernet Silicon Design is a part of Intel’s Data Center Group, developing state of the art networking and communications solutions to the Data center, Cloud and Comms markets. The departments products are high speed (>100G) controllers which performs advanced offloads for communications, Quality of service, classification and DMA protocols. Our SoC and discrete ASICs contains highly flexible VLSI designs with embedded FW and the team’s involvement begins at product architecture definition, through design execution and Si system-validation up until production stages.
The core group, containing a number of Design and DV teams work closely to integrate IPs into various SoC and discrete products. A design manager will be a part of the greater core development group and will lead microarchitecture efforts as well as design planning/ execution, physical design interaction (in Intel and non-Intel process) with deep involvement in verification and FPGA/ Si validation.
The rapid development of the networking business implies continuous improvement on performance and features and as such requires high rate of product architecture changes. Design manager should be able to drive new architectures implementations (from scratch) alongside support for existing products at different execution stages.
Inside this Business Group
• 7y+ Logic design experience in an ASIC development company.
• 3y+ Managerial experience in an ASIC development company.
• Networking experience (Ethernet, PCIe, TCP/IP).
• Physical design knowledge in advance processes.
• FPGA / emulation development / debug.
• Si debug.
• FW implementation in embedded microprocessors.
• SoC methodologies.