CPU/SoC Pre-Silicon Design Validation Engineer
Responsible to validate and integrate third party Intellectual Properties IPs ensuring they meet product specification and functionality before they are productized into physical chip. Required to work very closely with design teams and architects to implement the low-level Register Transfer Logic RTL design to ensure overall good functionality of the chip. Develop specific test environment/platform, validation methodology and test plan to validate System on Chip SOC design by identifying and exercising boundary conditions and special cases in an effort to "break" the chip to find that last elusive bug. Oversees definition, design, verification, and documentation for SoC System on a Chip development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs. Contributes to the development of multidimensional designs involving the layout of complex integrated circuits. Performs all aspects of the SoC design flow from highlevel design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing. Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results. May also review vendor capability to support development.
Inside this Business Group
Bachelor degree or Master in Electrical and Electronics, Computer Engineering or Computer Science with at least 5 years of relevant experience in System on Chip SOC design and validation experiences.
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.