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Job ID: JR0009757
Job Category: Intern/Student
Primary Location: Penang, PNG MY
Other Locations:
Job Type: Intern

Graduate Trainee

Job Description

Graduate trainee is expected to perform the following analog/mixed-signal circuit design functions:

  • Design circuits using schematic editor such as Cadence Virtuoso
  • Verify custom circuits through HSpice
  • Guide layout engineers on custom layout to ensure good circuit performance
  • Generate timing models for custom blocks
  • Help on custom IP release


The graduate trainee needs to possess basic knowledge about analog/mixed-signal circuit design. He/she needs to be familiar with Cadence Virtuoso and HSpice simulations. Optional skillset for this position includes PrimeTime, VCS logic simulations, RTL, DC and ICC. Minimum education requirement is Bachelor's degree. No prior related working experience is required.

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.

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