In this position you will be part of the Intel Labs Wireless System and Architecture team whose charter is to innovate, build and demonstrate cutting edge 5th generation low power wireless communication technologies.As a DSP HW Verification Engineer your responsibilities will include but not be limited to:- RTL Design for different DSP algorithms and other SoC glue logic.- RTL Verification using standard methodologies such OVM/UVM.- FPGA emulation.- Implementation of Communication Algorithms in C/C++ language- Interacting with architects, design engineers and design team experts in other areas like design validation, synthesis and verification to ensure that logic and circuit design capabilities meet the design needs and fit into the design flow.
Inside this Business Group
You should possess a Master's degree in Electrical or Computer Engineering with at least 1 years of experience in the following áreas:
- Working knowledge of FPGA design development
- Working knowledge of Verilog HDL language
- Working knowledge of C/C++ language
- Good English communication skills
- Excellent teamwork skills
- Good written and verbal communication skillsadditional qualification include
- Knowledge of pre-silicon and post-silicon validation techniques.
- Knowledge in wireless communications and digital signal processing is a plus.
- Knowledge in Matlab, Simulink languages is desirable
Intel Labs, the New Business Initiatives group (NBI), the Perceptual Computing Group and the New Devices Group (NDG). Additionally, New Devices Group and the New Business Initiatives group were combined into the New Business Group (NBG) which nests into NTG.