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Job ID: JR0007745
Job Category: Engineering
Primary Location: Santa Clara, CA US
Other Locations:
Job Type: Experienced Hire

Product Development Engineer

Job Description

Responsible for:

  • Ensuring the testability and manufacturability of integrated circuits from the component feasibility stage through production ramp.
  • Make significant contributions to design, development and validation of testability circuits.
  • Evaluation, development and debug of complex test methods.
  • Develops and debugs complex software programs to convert design validation vectors and drive complex test equipment.
  • Creates and tests validation and production test hardware solutions.
  • Tests, validates, modifies and redesigns circuits to guarantee component margin to specification.
  • Analyzes and evaluates component specification versus performance to ensure optimal match of component requirements with production equipment capability with specific emphasis on yield analysis and bin split capability.
  • Analyzes early customer returns with emphasis on driving test hole closure activities.
  • Creates and applies concepts for optimizing component production relative to both quality and cost constraints.
  • Autonomously plans and schedules own daily tasks, develops solutions to problems utilizing formal education and judgment.

This position involves work on a U.S. Government contract which may impose certain security requirements: If you are a U.S. citizen, the government may require that you certify that you are a U.S. citizen. If you are not a U.S. citizen, the government may require you to pass a security check before you can be approved to work on the project.

Please note that any offer by Intel for this position is conditioned upon meeting and/or passing the U.S. government's security check requirements should the government impose.


BS Degree in Electrical Engineering, Computer Engineering, Computer Science or a closely related field plus 3 years of experience OR a MS Degree plus 2 years of experience.

Additional preferred experience include the following:

  • DFT architecture or design like IOSF, mPHY, ME, etc.
  • Development, Evaluation and validation of analog and DFT circuits including concepts such as built in self-test BIST,  jitter, eye width margining, squelch, or LDO, Thermal Sensors, PLL/DLL, VCO, LC CLK, etc.
  • RTL, GLS and VTPsim simulation and test validation experience.
  • Test writing experience in multiple circuit areas in System Verilog, Python, or similar language.
  • System architecture.
  • Knowledge of IO protocols and specs PCI Express, SATA, USB3, DDR, WIO etc. is highly desired.
  • Silicon debug and characterization of new products including working with platform and system level validation teams to identify and close silicon issues.
  • Experience driving tester to support debug and characterization of silicon, desired is also ability to script experiments for both tester and bench systems.
  • Understanding of Circuits and Logic design methodology.
  • Understanding of device physics.
  • Any scripting perl, python is a plus.


Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.

Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.
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