The central IP team of Intel's Scalable Performance CPU Development Group SDG located at Massachusetts Microprocessor Design Center is looking for an Experienced IP verification Engineer to contribute in the high speed IO and/or high performance power delivery/Voltage Regulator IP space for Intel's client/server/chipset SOC designs.
Responsibilities include defining the mixed signal IP verification plan, strategy and architecture, and be responsible for the development of functional validation tests to verify the IP/system meets design specification.
The responsibilities will include but not be limited to:
The ideal candidate should exhibit behavioral traits that indicate:
The successful candidate will possess a BS, MS, or PhD degree in in Electronic Engineering / Computer Science/Computer Engineering or related field.
At least 5 years' experience in pre-silicon ASIC/SOC verification, including but not limited to validation environment development, tests development, test plan development, tests debugging.
Inside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.